From 9928093ec533a472ee8b0cbc068667adca98f7e2 Mon Sep 17 00:00:00 2001 From: Maxim Virta Date: Thu, 29 Oct 2026 15:27:27 +0100 Subject: [PATCH 1/2] [PWGCF] Bitmask selections updated for the V02 analysis code --- PWGCF/GenericFramework/Tasks/flowGfwV02.cxx | 66 ++++++++++++++++++--- 1 file changed, 58 insertions(+), 8 deletions(-) diff --git a/PWGCF/GenericFramework/Tasks/flowGfwV02.cxx b/PWGCF/GenericFramework/Tasks/flowGfwV02.cxx index 327372e0bc3..11a67bfd6c9 100644 --- a/PWGCF/GenericFramework/Tasks/flowGfwV02.cxx +++ b/PWGCF/GenericFramework/Tasks/flowGfwV02.cxx @@ -21,6 +21,7 @@ #include "PWGCF/JCorran/DataModel/JCatalyst.h" #include "Common/CCDB/EventSelectionParams.h" +#include "Common/CCDB/TriggerAliases.h" #include "Common/DataModel/Centrality.h" #include "Common/DataModel/EventSelection.h" #include "Common/DataModel/Multiplicity.h" @@ -214,8 +215,8 @@ struct FlowGfwV02 { // // Filters to be applied to the received data. // // The analysis assumes the data has been subjected to a QA of its selection, // // and thus only the final distributions of the data for analysis are saved. - // Derived-data bit masks. Every listed track bit is required; see gfwcollision::EventSel and gfwtrack::TrackSelection. - O2_DEFINE_CONFIGURABLE(cfgEventBitMask, uint16_t, static_cast(o2::aod::gfwcollision::DefaultEventMask), "Required event-selection bits for GFW derived data"); + // Derived-data track mask. Every listed track bit is required; see gfwtrack::TrackSelection. + // The event mask is built from cfgEventCutFlags when a GFW derived process is enabled. Configurable> cfgBitmaskSelections{"cfgBitmaskSelections", {0, 3, 6, 9, 12}, "Enabled TrackSelection bit indices for GFW derived data. DCA 0-5, TPC track 6-13, TPC PID 14-22, TOF PID 23-31. The default is the nominal quality selection"}; O2_DEFINE_CONFIGURABLE(cfgPidWindow, int, static_cast(o2::aod::gfwtrack::PidWindowNominal), "PID nSigma window for GFW derived data: 0 nominal, 1 tight, 2 loose"); @@ -300,6 +301,7 @@ struct FlowGfwV02 { std::unique_ptr fPtDepDCAxy; uint32_t trackBitMask = o2::aod::gfwtrack::NominalMask; + uint16_t eventBitMask = o2::aod::gfwcollision::DefaultEventMask; using GFWTracks = soa::Filtered>; @@ -319,6 +321,52 @@ struct FlowGfwV02 { IndProtonLow }; + // Required gfwcollision::EventSel bits for derived data, taken from the event-cut configurables. + uint16_t eventSelectionMask() + { + uint16_t mask = 0; + if (cfgEventCutFlags.cfgNoSameBunchPileupCut) { + mask |= o2::aod::gfwcollision::kNoSameBunchPileup; + } + if (cfgEventCutFlags.cfgIsGoodZvtxFT0vsPV) { + mask |= o2::aod::gfwcollision::kIsGoodZvtxFT0vsPV; + } + if (cfgEventCutFlags.cfgNoCollInTimeRangeStandard) { + mask |= o2::aod::gfwcollision::kNoCollInTimeRangeStandard; + } + if (cfgEventCutFlags.cfgNoCollInRofStandard) { + mask |= o2::aod::gfwcollision::kNoCollInRofStandard; + } + if (cfgEventCutFlags.cfgNoHighMultCollInPrevRof) { + mask |= o2::aod::gfwcollision::kNoHighMultCollInPrevRof; + } + if (cfgEventCutFlags.cfgIsVertexITSTPC) { + mask |= o2::aod::gfwcollision::kIsVertexITSTPC; + } + if (cfgEventCutFlags.cfgIsGoodITSLayersAll) { + mask |= o2::aod::gfwcollision::kIsGoodITSLayersAll; + } + if (cfgEventCutFlags.cfgNoTimeFrameBorder) { + mask |= o2::aod::gfwcollision::kNoTimeFrameBorder; + } + if (cfgEventCutFlags.cfgNoITSROFrameBorder) { + mask |= o2::aod::gfwcollision::kNoITSROFrameBorder; + } + if (cfgEventCutFlags.cfgTVXinTRD) { + mask |= o2::aod::gfwcollision::kNotTVXinTRD; + } + if (cfgTrackCuts.cfgOccupancySelection >= 0) { + mask |= o2::aod::gfwcollision::kOccupancy; + } + if (cfgUseAdditionalEventCut) { + mask |= o2::aod::gfwcollision::kGoodVertex; + if (cfgMultCut) { + mask |= o2::aod::gfwcollision::kMultCorr; + } + } + return mask; + } + void init(InitContext const&) { trackBitMask = 0; @@ -327,6 +375,10 @@ struct FlowGfwV02 { trackBitMask |= static_cast(1u << bit); } } + if (doprocessDerived || doprocessDerivedCorrected) { + eventBitMask = eventSelectionMask(); + LOGF(info, "GFW derived event-selection mask: %u", static_cast(eventBitMask)); + } projectMatrix(nSigmas->getData(), pidStates.tpcNsigmaCut, pidStates.tofNsigmaCut, pidStates.itsNsigmaCut); projectMatrix(nSigmasHighPurity->getData(), pidStates.highPurityTpcNsigmaCut, pidStates.highPurityTofNsigmaCut, pidStates.highPurityItsNsigmaCut); @@ -816,7 +868,7 @@ struct FlowGfwV02 { bool eventSelected(TCollision const& collision, const int& multTrk, const float& centrality) { if (cfgEventCutFlags.cfgTVXinTRD) { - if (collision.alias_bit(kTVXinTRD)) { + if (collision.alias_bit(::kTVXinTRD)) { // TRD triggered // "CMTVX-B-NOPF-TRD,minbias_TVX" return 0; @@ -961,7 +1013,7 @@ struct FlowGfwV02 { double v22npt = 0; double ptMeanMid = pidStates.hPtMid[PidCharged]->GetMean(); double ptFractionMid = 0.; - double dnxAB = fGFW->Calculate(corrconfigs.at(0), 0, kTRUE).real(); // V22 weight for AB + double dnxAB = fGFW->Calculate(corrconfigs.at(0), 0, kTRUE).real(); // V22 weight for AB double dnxABAB = fGFW->Calculate(corrconfigs.at(1), 0, kTRUE).real(); // V22 weight for ABAB // Check if the V22 weight is valid @@ -1520,8 +1572,7 @@ struct FlowGfwV02 { } loadCorrections(run); - const uint16_t eventMask = cfgEventBitMask; - if ((collision.eventSel() & eventMask) != eventMask) { + if ((collision.eventSel() & eventBitMask) != eventBitMask) { return; } if (std::abs(collision.posZ()) > cfgEventCuts.cfgZvtxMax) { @@ -1543,8 +1594,7 @@ struct FlowGfwV02 { LOGF(info, "run = %d", run); } - const uint16_t eventMask = cfgEventBitMask; - if ((collision.eventSel() & eventMask) != eventMask) { + if ((collision.eventSel() & eventBitMask) != eventBitMask) { return; } if (std::abs(collision.posZ()) > cfgEventCuts.cfgZvtxMax) { From 93e942174f83bd08eeb7b8b6a2999fad1e640c48 Mon Sep 17 00:00:00 2001 From: ALICE Action Bot Date: Thu, 29 Oct 2026 14:29:49 +0000 Subject: [PATCH 2/2] Please consider the following formatting changes --- PWGCF/GenericFramework/Tasks/flowGfwV02.cxx | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/PWGCF/GenericFramework/Tasks/flowGfwV02.cxx b/PWGCF/GenericFramework/Tasks/flowGfwV02.cxx index 11a67bfd6c9..90ae8e00762 100644 --- a/PWGCF/GenericFramework/Tasks/flowGfwV02.cxx +++ b/PWGCF/GenericFramework/Tasks/flowGfwV02.cxx @@ -1013,7 +1013,7 @@ struct FlowGfwV02 { double v22npt = 0; double ptMeanMid = pidStates.hPtMid[PidCharged]->GetMean(); double ptFractionMid = 0.; - double dnxAB = fGFW->Calculate(corrconfigs.at(0), 0, kTRUE).real(); // V22 weight for AB + double dnxAB = fGFW->Calculate(corrconfigs.at(0), 0, kTRUE).real(); // V22 weight for AB double dnxABAB = fGFW->Calculate(corrconfigs.at(1), 0, kTRUE).real(); // V22 weight for ABAB // Check if the V22 weight is valid